1. Field of the Invention
The invention relates generally to a circuit configuration and method of manufacturing filtering circuits with capacitors including the transient voltage suppressor (TVS). More particularly, this invention relates to an improved circuit configuration and method of manufacturing the filtering circuits implemented with resistor-capacitor (RC) or inductor capacitor (LC) with increased capacitances for a symmetrical bi-directional blocking transient voltage suppressor (TVS) that includes Zener diodes and Zener diode triggered bipolar transistors.
2. Description of the Relevant Art
The conventional technologies for designing and manufacturing a filtering circuit with resistor-capacitor (RC) or inductor-capacitor (LC) are challenged by a requirement to increase the capacitance for achieving a filtering effect. For the purpose of increasing the capacitance, typical method applied by those of ordinary skill in the art is to increase the junction areas. However, the method leads to undesirable device designs and degraded performances due to the facts that the devices implemented with such method further have a large die size or a thicker oxide layer in the trench.
In addition to these technical challenges, the convention technologies for designing and manufacturing the filtering circuits such as an electromagnetic interference (EMI) filter combined with a transient voltage suppressor (TVS) is still confronted with a technical difficulty that the filtering performance may become unreliable due to variation of the capacitance as now implemented in the EMI filter. Specifically, as will be further discussed below, the variations of the capacitance may be induced through change in the bias voltage and several environmental effects including light and noise. For audio signal receptions, the quality of the incoming signal receptions may be adversely affected when the functions performed by the EMI filters cannot be precisely controlled. Specific functional parameters for signal reception such as the cutoff frequency may be changed due to the variation of the capacitance in the EMI filter when the conditions of the operational environment are changed. Therefore, an urgent demand is now required to provide an effective solution to such problems.
Specifically, a transient voltage suppressing (TVS) circuit is often implemented with an electromagnetic interference (EMI) filter for application of an audio signal reception. The TVS is implemented with an EMI filter that can have either a symmetrical or an asymmetrical configuration as that shown in FIG. 1A or 1B respectively. The EMI filters as shown are implemented with a combination of resistor-capacitor (RC) and resistor-inductor (RL) and integrated with a combined TVS. The EMI filter and TVS integrated circuit are implemented as a monolithic device thus provides advantages that the EMI filter when implemented with TVS has better filtering performance. Typically in a low pass filter to attenuate the cellular band signals in a range of 800 MHz to 3 GHz, an attenuation of at least 35 dB can be achieved. Furthermore, such device has low parasitic resistance, capacitance and inductance.
In the EMI filter implemented with TVS shown in FIGS. 1A and 1B, the capacitance as that required by the EMI filter is typically provided by implementing a Zener diode in the filter and the Zener diode has an inherent junction capacitance. Thus, the diode junction capacitance in the Zener diode implemented in the TVS is also available to function as a capacitor for the EMI filter. However, the junction capacitance of the Zener diode as implemented is also a function of the biased voltage. For the purpose of designing the EMI filters as that shown in FIGS. 1A and 1B, the bias voltage for the symmetrical filter is zero volts and for the bias voltage of the asymmetrical filter is Vcc/2, where Vcc is the supply voltage. However, the capacitance may vary due the bias voltage and that can cause the filter cutoff frequency to vary with the DC bias thus leads to unreliable filtering performance. FIGS. 1C and 1D illustrate measurements of the capacitance variations in symmetric and asymmetric filters as a function of DC bias for a chip-scale package (CSP) and a DFN (DualFlat No Lead) package.
When a symmetrical blocking structure is implemented with the symmetrical EMI filter shown in FIG. 1A, the implementation of the Zener diode is configured to use a floating junction as a result of which the capacitance of the diode junction is very sensitive to the environmental conditions such as light and noise in addition to the variations of the capacitance that is dependent on the DC bias. When the EMI and TVS integrated device is packaged as a chip-scale package (CSP), the integrated EMI-TVS as implemented would require a high capacitance tolerance value of as much as 20% in order to maintain reliable filtering performance with the variation in environment conditions such as light.
Therefore, a need still exists in the fields of circuit design and device manufactures for providing a new and improved circuit configuration and manufacturing method to resolve the above-discussed difficulties. Specifically, a need still exists to provide new and improved EMI filter combined with a TVS that can provide linear and controllable capacitance such that the limitations and difficulties can be resolved.